Parallel Simulated Annealing Algorithm for Standard Cell Placement in VLSI Design
نویسندگان
چکیده
منابع مشابه
Parallel simulated annealing strategies for VLSI cell placement
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process, and as a result several research efforts have been undertaken to parallelize this algorithm. Most previous parallel approaches to cell placement annealing have used a parallel moves approach. In this paper we investigate two new approaches that have been proposed for gen...
متن کاملA Simulated Annealing Algorithm for Unsplittable Capacitated Network Design
The Network Design Problem (NDP) is one of the important problems in combinatorial optimization. Among the network design problems, the Multicommodity Capacitated Network Design (MCND) problem has numerous applications in transportation, logistics, telecommunication, and production systems. The MCND problems with splittable flow variables are NP-hard, which means they require exponential time t...
متن کاملCongestion Driven ' Placement for ' VLSI Standard Cell Design
The submicron regime has caused the interconnect delay to become a critical determiner of circuit performance. As a result, circuit placement is starting to play an important role in today's high performance chip designs. In addition to wirelength optimization, the issue of reducing excessive congestion in local regions such that the router can finish the routing successfully is becoming anothe...
متن کاملAn evaluation of parallel simulated annealing strategies with application to standard cell placement
Simulated annealing, a methodology for solving combinatorial optimization problems, is a very computationally expensive algorithm, and as such, numerous researchers have undertaken efforts to parallelize it. In this paper, we investigate three of these parallel simulated annealing strategies when applied to standard cell placement, specifically the TimberWolfSC placement tool. We have examined ...
متن کاملParallel standard cell placement algorithms with quality equivalent to simulated annealing
Parallel algorithms with quality equivalent to the simulated annealing placement algorithm for standard cells [23] are presented. The first, called heuristic spanning, creates parallelism by simultaneously investigating different areas of the plausible combinatorial search space. It is used to replace the high temperature portion of simulated annealing. The low temperature portion of Simulated ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2014
ISSN: 0975-8887
DOI: 10.5120/15172-3047